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the hardware implemented stack memory access. The machine-level language was based on the Reverse Polish
Notation (which needs no parenthesis), and represented sequences of operands (or pointers on operands) placed
on the stack with operations performed on the operands at the top of the stack. The Elbrus system software was
written in proprietary high-level language El-76, which was developed in parallel with the design of the hard-
ware. The Elbrus designers strongly relied on El-76 for all needs to write system level software. It was similar
to Algol-68, whose block structure easily executes on a stack-based architecture. El-76 had better-developed
condition-handling constructs, but, unlike Algol-68, provided parallelism only at the procedure level. The Elbrus
operating system had functionality similar to that of the Burroughs Master Control Program.
Among other available high-level programming languages were: Fortran, COBOL, PL/1, Pascal, Refal, Lisp,
Forth, Simula-67, and SNOBOL4.

Elbrus Related
Elbrus 1-K2, or SVS. The Elbrus program was actively supported and financed by the Soviet military-indus-
trial complex. However, delays in the design and production, as well as concerns about to radical switch from
previous computing environments to new proprietary architecture and software, force to think about softening
the transition from popular BESM-6 to Elbrus by developing Elbrus 1-K2, better known as SVS, a specialized
Elbrus processor compatible with the BESM-6 software and Elbrus hardware. SVS significantly expanded main
memory and external storage capabilities for old programs of the BESM-6 users.
Elbrus 3-1. The core of Elbrus 3-1 was a powerful modular pipelined processor capable of handling two indepen-
dent threads: vectors and scalars. Scalars are injected into a vector pipeline and processed between two adjacent
components of the vector. The memory switch provided up to 8 concurrent memory accesses per a clock cycle.
As a result, the processor speed reached 500 MFLOPS on on vector operations. It was assumed that SVS, which
had a decent amount of memory and rich BESM-6 software, will act as a host machine, using Elbrus 3-1 as a
powerful vector-scalar co-processor.
Elbrus 3. Elbrus 3 developed in 1986 was a 16-processor computer. Its VLIW (Very Long Instruction Word) ar-
chitecture was completely different from the architecture of both Elbrus 1 and Elbrus 2. Its serial production has
never been launched.

Elektronika SS BIS
Vladimir A. Melnikov, one of the designers BESM-6, left the Institute of Precision Mechanics and Computer
Engineering to start a new project, independent of the Elbrus design. The project was sponsored by the semicon-
ductor industry to test how the LSI (Large Scale Integration) chips could by used to build high-performance
mainframes. After analysis of the current advances in supercomputing, the decision was made to follow the
Seymour Cray way and to design a vector pipeline computer, called Elektronika SS BIS (BIS is the Russian
abbreviation for LSI).
Elektronika was not a clone of the Cray’s computers and its architecture incorporated some interesting new solu-
tions. For example, the operation of division was done in one cycle instead of three cycles as in Cray 1. There
were separate functional units for the floating-point scalar and vector operations that parallelized processing of
scalars and vectors. There was also a semiconductor mass memory, which was an intermediate broker between
the main (RAM, random access memory) memory and the external storage. It was designed to store actively used
files and to eliminated the imbalance between the low-speed transmission of data from disks and fast processing
of the data in the processor. A specialized processor chose data in an arbitrary order by calculating their addresses
on-fly during the communication between the main and mass memories. An important achievement was the cre-
ation of an efficient freon cooling system. Completely original was the software for Elektronika SS BIS aimed
at achieving high-efficiency in using the hardware and at optimizing the application execution.
In 1985, a prototype was successfully tested. In a single-processor version, it delivered up to 250 MFLOPS, that
for the mid-80’s was quite consistent with the supercomputer level. However, the final version of the computer
appeared only in 1989, when its component base was already outdated, and performance lagged far behind the
global standards for the high-performance systems. Nevertheless, by 1991 four copies of “Electronics SS BIS
were delivered.

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